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The Thirteenth IEEE Asia-Pacific Computer Systems Architecture Conference

ACSAC 2008

Submission Page


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Title of Submission:  


List of Authors:

Please enter the complete list of authors for your submission, in the order in which they will appear on the abstract. You can add as many author slots as you want, to accommodate the total number of authors for your submission.

First name(s) Last name Email Affiliation
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Contact Information:

Title 
First name*
Last name*
  Affiliation/organization*
       Affiliation Dept/Lab 
Phone*
Fax 
Email*
Country*
Address 
Address 
Address 
City/Town*
Zip/Postal Code*


Conflicts of Interest:

Please identify all potential committee members and reviewers who should not review this submission, due to having a conflict of interest with you or any of your co-authors. It is crucial that you fill in this section as carefully as possible, and that you do so in consultation with all of your co-authors. For more information on how to determine your conflicts of interest, please see the author guidelines posted at the website for ACSAC.

Reviewer checklist: Please carefully examine the list of names below, and check-off any of the people who should not review this submission, due to a conflict of interest with one of the authors. (This also includes the names of any co-authors, if they appear below.)

 Organizers ACSAC 2008     Vijayan Asari     Morteza Biglari-Abhari     kostas Bousias   
 Wenguang Chen     Bruce Christianson     Yeh-Ching Chung     Chung-Ping Chung   
 Oliver Diessel     Xiaobing Feng     Guang R. Gao     Jean-Luc Gaudiot   
 Dan Grigoras     Dan Grigoras     Gernot Heiser     Min-Chuan Hung   
 Chris Jesshope     Hong Jiang     Jeremy Jones     Deok Gyu Lee   
 Pei-Zong Lee     Kuan-Ching Li     Wan-Jiun Liao     Hock Beng Lim   
 Yu-Hsin Lin     Pangfeng Liu     Philip Machanick     Worawan Marurngsith   
 John Morris     Sukumar Nandi     Tin-Fook Ngai     Amos Omondi   
 Amos Omondi     Andy D. Pimentel     Ronald Pose     Partha Roop   
 Zoran Salcic     Ce-Kuen Shieh     Mark Smotherman     Rajeev Thakur   
 Chia-Ta Tsai     Mateo Valero     Lucian N. Vintan     Dongsheng Wang   
 Sheng-De Wang     Cho-Li Wang     Weng-Fai Wong     Chih-Ying Wu   
 Jingling Xue     Pen-Chung Yew     Jiazheng Zhou   

Additional conflicts: The committee may call on external reviewers to help evaluate your submission. These reviewer names may not appear in the list above. Therefore, we also request that you identify any other conflicts of interest you can think of. Specifically, you should list anybody you know of who works in an area related to ACSAC, and who has a conflict of interest with either you or one of your co-authors. (You do not need to include your own author names in this list.)

First name Last name Email Affiliation
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Abstract:

Type (or cut-and-paste) a short ASCII abstract for your submission. It should not include the author/title information, which was already entered above. You must enter plain ASCII text only, and you may not exceed 150 words.

 


Submit Paper:

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Find the file containing your submission: 


Keywords/Topics:

Please use the list of topics below to characterize your submission. Check all categories that seem appropriate.

Instruction-level parallelism (ILP) and thread-level parallelism (TLP)
Processor architectures and microarchitectures
Parallel architectures and computation models
Reconfigurable computing systems
Memory systems
OS for emerging architectures
High-performance I/O architectures
Compilers and tools for all of the above
Benchmarking and measurement of real systems
OS and architecture support for secure computing
Architectures for high-productivity embedded systems
Simulation and performance evaluation
Hardware support for OS and compilers
Energy efficient and power aware techniques
Interconnect networks and network interfaces
Methodologies and architectures for application-specific systems
Impact of VLSI scaling and advanced submicron design
High-availability, high-reliability and fault tolerant architectures
Hardware/software partitioning, co-design and co-verification
Self-timed/globally asynchronous locally synchronous designs
Mobile system designs and implementations
Ubiquitous computing and architectures
Next-generation computing technologies
Other
 
 



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