26th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits

IPFA 2019

Participant Registration Page


All presenters and attendees must register online.

Fee is not pro-rated or refundable.

The registration fee for each attendee / presenter / exhibitor includes the following:
- Attendance and softcopy of presentation slides of all tutorials
- Attendance and softcopy of papers presented at the conference
- Luncheons and tea breaks for 2 to 5 July 2019
- One banquet ticket for 4 July 2019.

10% discount for groups of 5 or more (same organization).

The deadline for early bird registration is 30 May 2019.

Please contact the IPFA Secretariat if you need any assistance
Mrs Jasmine Leong
+65 6743 2523

Type of Registration

Please choose one option only:
IEEE Member  
Non-IEEE Member  
IEEE Membership No.  

Contact Information

First Name:  (*)
Family Name:  (*)
Email:  (*)
Organization:  (*)
Country  (*)

Paper Information

This portion is only for authors.
Each paid registration allows the author to present up to a maximum of 2 papers.
Please give the paper ID(s) and indicate if you are presenting the paper below.
1st Paper ID  
2nd Paper ID  


Any Dietary Restrictions?  (*)
Attending Banquet?  (*)


Is invoice needed?  
In case you need invoice:
Is receipt needed?  
Which kind of invoice?  
If you selected "Chinese invoice"
The invoice title should be the same as account name when transferring your money, otherwise please make sure to note the invoice title on your transfer.
Invoice Title:  
Tax Identification Number:  
If you selected "Paper invoice (oversea attendees)"
For oversea attendees, generally we will provide the paper invoice with conference chair's signature. Please provide the following information for the paper invoice.
Payer's Name:  

Tutorial Sessions (2 July 2019)

Attendance for tutorial sessions are included in your registration fee. We appreciate if you could indicate which tutorial(s) you are planning to attend so that we can channel resources appropriately.

Session 1


T1 -  NBTI and PBTI - Fundamentals to Circuit Level Implications
(Prof. Jianfu Zhang, Liverpool John Moores University, UK)

T2 -  Physical Failure Analysis - Progress and Applications with Case Studies
(Dr. David Wu, TSMC, Taiwan (Retired))

Session 2


T3 -  High Power Electronics Reliability
(Prof. Francesco Iannuzzo, Aalborg University, Denmark)

T4 -  2.5D/3D Package Level Failure Analysis
(Dr. Susan Li, Cypress Semiconductors, USA)

Session 3


T5 -  MOL and BEOL Dielectrics and Interconnect Reliability
(Dr. Baozhen Lin, IBM System and Technology Group, Essex Vermont, USA)

T6 -  Electrical Fault Isolation - Laser Voltage Probing
(Dr. Venkat Krishnan Ravikumar, AMD, Singapore)

Session 4


T7 -  Heterogeneous Integration and Package Level Reliability
(Dr. Chandrasekara Kothandaraman, IBM Research, Yorktown Heights, USA)

T8-  Electrical Fault Isolation - LADA
(Dr. Goh Szu-Huat, GlobalFoundries, Singapore)

Note: Tutorial sessions arrangement are tentative and can be subjected to change

Session 1  
Session 2  
Session 3  
Session 4  

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